The present invention relates generally to communication between a plurality of digital processors in a multiprocessor-based computer system and peripheral devices, such as disk drives and tape drives, which operate at disparate speeds. More particularly the invention relates to an architecture for communicating between two independently-operating ports and peripheral devices coupled to a version of the Small Computer System Interface (SCSI).
Several classes of digital computer systems use a plurality of independent processors to perform computer operations. Examples include fault-tolerant, modular and parallel processing systems. These processors, herein referred to as host processors, require digital data exchange (input and output) with other devices, known as peripherals.
Typically data is exchanged via a system bus under the supervision of a bus controller. Information exchanged with the peripheral devices is typically under the supervision of an input/output subsystem called a device controller.
In one example of a multiprocessor-based fault-tolerant computing system disclosed in U.S. Pat. No. 4,228,496 to Katzman et al., a device controller is provided which facilitates exchange of high speed, essentially synchronously-communicated data with relative low-speed, essentially asynchronous peripheral devices. The device controller is constructed to insure that no single host processor failure can impair system operation. The Katzman et al. patent is incorporated herein by reference and made a part hereof, since a specific embodiment of the present invention is intended to improve upon the device controller disclosed in the Katzman et al. patent.
The device controller in the Katzman et al. patent is constructed with the intention of handling exchange of data at relatively high data rates as far as the host processor is concerned in order to minimize interference with programs running in the host processors. The device controller is an interrupt-driven system and provides an input/output program interrupt (IO interrupt) only upon completion of a data transfer in order to relieve the host processor of the burden of being dedicated to the peripheral device during data transfer. The device controller has multiple ports, each of which is logically and physically independent of all other ports so that each device controller can be connected for access to at least two different host processors.
To accomplish its tasks, the device controller of the computing system disclosed in the Katzman et al. patent employs a microprocessor which is dedicated to input/output operations (I/O MPU). The I/O MPU controls an input/output bus structure internal to the device controller (device controller bus structure) over which is carried all data from any requesting host processor and any responding peripheral device as well as data intended solely for its own operation and control of commands. It is through this internal bus structure that the host processor informs the I/O MPU of data transfer type, requested peripheral device, data block size, priority and the like. It is also through the I/O MPU and the device controller bus structure that "ownership" of the operation of the device controller is effected.
Experience with the device controller in accordance with the patent has uncovered a number of shortcomings. For example one shortcoming is within the device controller itself. It has been discovered that, despite the advantage of independent control of the input/output functions by a dedicated microprocessor, such an arrangement does not make the most efficient usage of the valuable time of the host processor. It has been found that even the fastest microprocessors still require a finite time to interpret commands (e.g., input/output requests), which does not make efficient use of time on both the device controller bus structure and on the system bus in the relatively complex environment of a multiprocessor system.
Moreover, in the device controller of the Katzman et al. patent, the device controller is constructed to grant "sole ownership" to only one host processor at a time through a switching scheme which selects among ports of the device controller. Conventionally, there are only two ports and only one ownership latch which grants ownership to either a first port or a second port and hence only one channel I/O bus. Hence, even though there are in theory multiple paths to a peripheral device through a device controller, only one peripheral can be used by a host processor, and only one host processor can have access to any peripheral through the device controller when but a single port is in use and in the process of exchanging data. Access to the device controller from other host processors must thereafter be made through the host processor having ownership of the device controller. This represents a serious shortcoming when several peripheral devices are coupled through a single device controller and several host processors desire access to those pheripheral devices.
Another shortcoming of the device controller in accordance with the invention disclosed in the Katzman et al. patent is the limited ability to connect the device controller with large numbers of peripheral devices or peripheral devices having an interconnection structure of selected types which have been widely accepted as standards. With the proliferation of peripheral device types, it is no longer feasible to construct a dedicated interface for each type or brand of peripheral device, each with its unique requirements and characteristics. This is particularly true at the growing "low end" of the computer market, where systems once costing hundreds of thousands of dollars are being superseded by system costing only a fraction of its predecessor. One reason has been standardization, which creates economies of scale.
However, there has been little done to merge fault-tolerant computing systems with their advantages with the various standard input/output interfaces or buses. One emerging peripheral device input/output interface is the SCSI bus, which is now widely accepted for many personal computer applications. As a consequence, many low-cost yet high-quality peripheral devices are now available.
What is needed is a device controller which is not subject to these shortcomings.